1. Field of the Invention
This invention relates primarily to data processing systems and more particularly to a communication multiplexer using a first in-first out memory for storing a variable list of channel numbers used in polling a plurality of devices coupled to the communication multiplexer by communication lines.
2. Description of the Prior Art
A data processing system may include a central processing unit, a main memory and a plurality of input/output devices. Since a number of input/output devices may request operation at the same time with the central processing unit or the main memory, a system of priorities must be established so that the system can operate with the input/outout devices in an orderly fashion. The Encyclopedia of Computer Science, edited by Ralston and Meek, Copyright 1976 by Mason/Charter Publishers Inc. describes a number of polling techniques of the input/output devices. They include a "radial selector" or a private line arrangement; and a "daisy chain" or party line arrangement. In either arrangement, the input/output devices may be passive and respond to a polling signal which queries each input/output device in turn; or the input/output devices may be active and generate their own interrupt signal.
U.S. Pat. No. 4,261,033 issued Apr. 7, 1981 entitled "Communications Processor Employing Line-Dedicated Memory Tables for Supervising Data Transfers" describes a system having active channels. Each input/output device requesting service sends its channel number to the communication multiplexer which gives highest priority to the lowest channel number. These types of priority resolving systems allow the higher priority devices to "hog" the system. (This works to the disadvantage of a system having equal performance input/output devices such as a bank of cathode ray tube displays.)
U.S. Pat. No. 4,271,467 issued June 2, 1981 entitled "I/O Priority Resolver" describes apparatus including a read only memory which is responsive to interrupt signals from the input/output for selecting the highest priority input/output device requesting service. Here the order of priority is fixed in the read only memory. To change the order of priority requires a different read only memory.
These types of systems have a fixed priority wired into the system and have the disadvantage of some input/output devices being able to "hog" the system while other input/output devices do not get their share of system access.
The hardware required is reduced by the use of a microprocessor controlling communication lines through the use of channel control blocks stored in a memory. Such a system is described in U.S. Pat. No. 4,133,030 entitled "Control System Providing for the Transfer of Data in a Communications Processing System Employing Channel Dedicated Control Blocks". This system, however, limited the throughput by restricting the number of communication lines that could be processed.
It should be understood that the references cited herein are those which the Applicants are aware of and are presented to acquaint the reader with the level of skill in the art and may not be the closest reference to the invention. No representation is made that any search has been conducted by the Applicants.